The Total MIPI Soundwire IP Solution enables early adopters the fastest path to adoption of this new standard by offering a comprehensive IP package that includes the Verilog RTL source code validated for compliance with the standard, a comprehensive test environment & compliance suite for validation of the IP, a Sound wire hardware development kit for FPGA prototyping and interoperability testing, a Sound wire protocol analyzer and the complete Soundwire software stack.
The IP is fully configurable for the number of (options like endpoint, audio channels etc.) to meet a wide range of audio applications. Soundwire is suited for small, very cost-sensitive audio peripherals such as amplifiers and microphones.
The major differences between v1.0 and v1.1 are:
● Configurable port direction – allows the Data Port to be either Sink or Source at run time
● Reduced Data Port – specifies certain optional features and registers to provide more flexibility compared to Simplified Data Port
● BRA Failure interrupt