The ONFI 4.2 NFC Driver is a low-level driver developed for Arasan’s ONFI 4.2 Nand Flash Controller IP that is used to communicate with the Nand Flash Device. The driver can also be used for validating a Nand flash device during its development and integration life cycles thereby helping designers reduce the time to market for their products. It provides a set of generic APIs to identify, read, program, and erase the flash device.
The Driver consists of two layers –, Hardware layer, and OS Abstraction Layer.
Diagram
ONFI NAND Controller Driver Architecture
Features
ONFI 4.2 controller has been extensively rewritten to provide both a higher speed at the front end, as well as higher command parallelism. So, controller and driver does not support backward compatibility
ACS’s NAND Flash Host Controller (NFHC) IP is design to work with its NAND Flash Physical Layer (PHY) IP
ONFI 4.2 version of the PHY IP can now work at speeds up to 1.6GT/s
Supports SDR, NV-DDR, NV-DDR2 and NV-DDR3
Easy-to-use interface for applications
Fully documented generic device operation APIs
Supports Read, Program and Erase Operations
Supports ZQ Calibration long and short
Supports Read Status and Read Status Enhanced
Supports Read parameter page and Read Extended parameter page
Supports Get / Set features and LUN Get /Set features
Supports Volume select
Supports LUN Resets
Supports On Die Termination
Easily portable to any OS, processors or hardware
DELIVERABLES
Source code in C language and binaries for ONFI NAND Controller driver
User Manual
BENEFITS
System manufacturers can port the ONFI NAND Controller Driver to respective system hardware and operating systems
Silicon developers can use the driver and board environment to test the device silicon during development
Silicon vendors can use the driver to create a reference system design for their customers
