SoundWireI3S (MIPI SWI3S) is a new audio interface standard developed by the MIPI Alliance. “Arasan was the industry’s first provider of IP for the MIPI SWI3S standard and provides a Total SWI3S IP solution that includes the manager IP, peripheral IP, PHY IP, Software Stack and HDK”.
Arasan’s SWI3S (SoundWireI3S) Manager Controller IP communicates in half-duplex fashion with one or more SWI3S Peripherals, using one of several physical interfaces (PHYs) defined within this Specification (including both single-ended and differential signaling options) to match a wide range of physical system constraints.
The SWI3S Peripheral IP is a configurable, synthesizable RTL block that implements the device-side of the SWI3S serial audio transport standard. It is intended for SoC and FPGA designs that connect one or more audio converters — ADCs, DACs, or both — to a SWI3S manager over a single DP/DN pair.