The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box. The HDK contains I3C Master and Slave FPGA Boards programmed with Arasan’s I3C Master & Slave IP respectively, I3C software stacks and reference schematics. The HDK will also be compatible with open-source I3C drivers. Arasan’s I3C IP Cores are fully configurable across multiple parameters through simple scripts making it suitable for a variety of Sensor applications. Arasan’s I3C IP has been validated at the RTL with multiple I3C VIP vendors and the System Level at MIPI Interoperability Sessions with participation from the major companies actively implementing the I3C specifications. This ensures Arasan’s I3C IP is interoperable with multiple vendor solutions and is compliant to the specifications.
The Arasan MIPI I3C Total IP in a Box is a fully licensable solution: Upon successful prototyping with the MIPI I3C HDK Total IP in a box, customers can license Arasan’s I3C Master and Slave IP for either FPGA or ASIC use. The bare metal version of the software driver software source code is also licensable while the PCB schematics will be provided free of charge to licensees.
MIPI I3C is a chip-to-chip interface that can connect all sensors in a device to the application processor. It consolidates the features of i2C, SPI and UART into a simple two-wire interface. The specification achieves clock rates up to 12.5 MHz and provides options for higher performance, high-data-rate modes. Another key advantage is that it can be implemented using standard I/O’s on a CMOS process. I3C is also a low power interface using a fraction of the power consumed by i2c for the same performance.
Arasan has participated in multiple MIPI I3C Interop Workshops to ensure compliance of it’s I3C Master IP, Slave IP, I3C Software and HDK