Arasan’s most advanced CAN-XL Controller Core performs serial communication as per CAN 2.0, CAN-FD & CAN-XL Specifications. It also supports original Bosch Protocol & ISO 11898 specifications for TTCAN (Time Triggered Operation) as specified in ISO11898-4. The design is fully optimized to support AUTOSAR and SAE J1939 specifications. Arasan’s CAN-XL Controller core is easy to integrate with the Host processor using AMBA-AXI standard interface. This highly configurable design supports programmable Interrupts, data and baud rates, acceptance filters & buffering schemes specific to the application.
Fig 1 Block Diagram of CAN-XL ControllerTable 1 Design Variants & Specifications they support
Verification
Arasan’s CAN-XL Controller Core has been rigorously verified and has been made production ready. It has been verified through extensive simulation and compliance check using multiple 3rd party Verification IPs. The Coverage report is available upon request. The CAN-XL Controller Core is verified during Synthesis, place and route and is ready for Plug Fests. This design can be ported to An ASIC or an FPGA design.
Support
The design core is delivered within 90 days from purchase. Thirty days of phone and email technical support is included. Optional maintenance support options are available for purchase.
Mixed CAN-XL and CAN-FD Network for design freedom
Arasan’s CAN-XL Controller Core supports a mixed CAN-XL & CAN-FD Network with 2 different data rates on the same bus. In this mode CAN-XL core is limited to SIC (Signal Improvement Capability) mode only to maintain right bandwidth for each node.
Fig 2 CAN-XL & CAN-FD Mixed Network-2 different data rates on the same bus
Features
CAN Specifications Support • CAN 2.0, CAN-FD (ISO 11898-1.2015 & legacy ISO and Bosch Specifications) • CAN-XL (CiA 610-1 version 1.0.0) • TTCAN (ISO 11898-4 level 1) • AUTOSAR and SAE J1939 • Fully programmable 1Mbits/sec with CAN 2.0 and several Megabits/sec for CAN-FD & CAN-XL design
Enhanced Safety with CADsec Protocol support • Implements cascaded CRC with Hamming Distance-6, meaning all errors detected • Optional CADsec for node-to-node protection using 4-byte header with ciphercontrol, secure channel ID & 128-bit authentication tag • Optional Payload Encryption • Loop-Back Mode for self-diagnostics • Time stamping compliant to CiA-603 Specification • ISO-26262 ASIL-B Readiness with ECC for SRAM memory • Optional ISO26262 ASIL-C Support
Ease of Integration, Usage & Porting • AMBA-AXI Interface • Optional Multi-CAN Wrapper for controlling multiple CAN Bus Nodes using a single host CAN Controller • Supports CAN-XL Transceiver with Mici (Medium Independent CAN Interface) for Dual-Mode Transceivers
Compliance Check • Multiple 3rd party CAN2.0, CAN-FD & CANXL Verification IP Protocol Compliance checked
Deliverables
Includes • System Verilog RTL Source Code • A simplified Testbench with simulation models to run initial set of tests after release • Synthesizable Netlist • Synthesis Scripts and exception lists • Timing Report • Protocol Compliance & Coverage Report • Sample Firmware with Drivers • Application Notes
Note*: ” License does not include the CAN Protocol License and CAN Trademarks”
