UFS 3.1 Device

UFS 3.1 is the next specification update pending from JEDEC. Arasan will offer UFS 3.1 compatible Host and Device Controllers in late Q2 2017 to select customers. Key Differences between UFS 3.1 and UFS 2.1 are: Multiple RPMB regions with unique auth key, register a logical address Mandatory support for Gear3 5.8Gbps (M-PHY v3.x) Mandatory […]

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UFS 3.1 host

Arasan’s Universal Flash Storage 3.1 (UFS 3.1) is a simple but high-performance, serial interface primarily used in mobile systems, between host processing and nonvolatile eXecute-In-Place (XIP) or mass storage memory devices. Mobile phones, UMPC, DSC, PMP are some of the typical applications for UFS Host Controller IP. The majority of these applications require mass storage […]

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MIPI C-PHY℠ v2.0 + D-PHY℠ v2.5 Combo IP Core

Overview Arasan Chip Systems, the leading provider of IP for MIPI Standards, presents its latest MIPI C/D-PHY Combo IP. This Tx/Rx transceiver complies with the MIPI Alliance C-PHY℠ v2.0 and D-PHY℠ v2.5 specifications, with world-class area and power dissipation, and is available for a range of foundry processes. This IP delivers 6 Gbps per lane […]

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MIPI D-PHY℠ v2.5 IP Core

Overview Arasan Chip Systems, the leading provider of IP for MIPI Standards, presents its latest MIPI C/D-PHY Combo IP. This Tx/Rx transceiver complies with the MIPI Alliance C-PHY℠ v2.0 and D-PHY℠ v2.5 specifications, with world-class area and power dissipation, and is available for a range of foundry processes. This IP delivers 6 Gbps per lane […]

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Mipi CSI 2 V1.2 to V2.1 | CSI-2 v1.3 Transmitter IP

Introduction About CSI The MIPI®Alliance the Camera Serial Interface (CSI-2) dates back to November 2005 and was in widespread use in consumer devices by 2009. CSI-2 V1.1 was approved in January 2013. CSI-2 v1.2 was released in September 2014. The updated version, CSI-2 v1.3 (covered in this document) was released in February 2015. Demand for […]

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I3C Host IP v1.1 | I3C Master IP

The MIPI I3C host interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compatibility. This standard offers a flexible multi-drop interface between the host processor and peripheral sensors to support the growing usage of sensors in embedded systems. The main purpose of MIPI I3C is threefold: To standardize sensor […]

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I3C Device IP v1.1 | I3C Slave IP

The Arasan I3C Device IP Core Implements Device functionality as defined by the MIPI Alliance’s I3C Specification. The I3C bus is used for various sensors in the mobile/automotive system where an I3C Host transfers data and controls information between itself and various sensor devices. The I3C Device Controller IP Core can be easily integrated into […]

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xSPI Master IP I xSPI NOR IP

Arasan Chip Systems, the leading provider of IP for Mobile Storage Standards, presents its latest xSPI Master IP for access to NOR Flash Devices. This Universal NOR Flash IP supports a variety of NOR Devices and multiple Protocols, combines ease of use with high reliability, low power and speed under all conditions, including automotive applications. […]

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The eMMC Host Controller IP

The eMMC Host controller IP from Arasan Chip Systems is a highly integrated host controller IP solution that supports three key memory card I/O technologies: eMMC 4.51 SD 3.0 SDIO 3. The eMMC Host controller IP handles all of the timing and interface protocol requirements to access these media as well as processing the commands […]

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MIPI CSI-2 V2.1 Transmitter IP

The Arasan MIPI CSI-2 Transmitter IP Core functions as a MIPI Camera Serial Interface between a peripheral device (display module) and a host processor (baseband, application engine). The Arasan MIPI CSI-2 Transmitter IP provides a standard, scalable, low-power, high-speed interface that supports a wide range of higher image resolutions. Pixel Data received from over the […]

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