Arasan Chip Systems, the leading provider of IP for Mobile and Automobile SOC’s, presents its latest eUSB2 V2.0 IP. eUSB2 V2.0 is a new generation specification proposed by USB Association. While traditional eUSB2 meets basic connectivity needs at 480 Mbps, modern SoCs and peripherals demand significantly higher throughput. eUSB2-V2.0 bridges this gap by delivering up […]
eUSB2V1.2 Controller+PHY IP
Arasan Chip Systems, the leading provider of IP for Mobile and Automobile SOC’s, presents its latest eUSB2 IP. eUSB2 is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1.2V/1.0V as the interface operating voltage. Unlike traditional USB, which uses external connectors and cables, eUSB is optimized for direct […]
eUSB2 IP
Arasan’s eUSB2 IP is a complete controller + PHY solution that brings USB 2.0 compatibility into low-voltage, chip-to-chip environments (≈1.0 V–1.2 V) for advanced SoCs. It supports USB high-speed, full-speed, and low-speed modes and reuses USB 2.0 software programming models with no changes required. eUSB2 also uses the same two data line configurations, eD+ and […]
Arasan xSPI + eMMC Combo PHY IP
Overview This IP integrates both xSPI (Expanded Serial Peripheral Interface) and eMMC 5.1 PHY (Physical Layer) into a single unified solution, enabling support for two distinct memory protocols within the same IP. By combining the PHY layers for both interfaces, the design simplifies system integration, reduces area and pin count, and enhances design flexibility for […]
UFS 4.1Host IP
Overview Universal Flash Storage (UFS) is a JEDEC standard for high performance mobile storage devices suitable for next generation data storage. UFS is also adopted by Mobile Industry Processor Interface (MIPI) as a data transfer standard designed for mobile systems. UFS incorporates the MIPI UniPro standard as well as the MIPI Alliance M-PHY standard. Most […]
SWI3S Manager Core IP
Overview Arasan’s SWI3S (SoundWire I3S Interface) Manager Controller Core IP implements the link protocol to communicate in half-duplex fashion to transfer the Audio streams and the Control information together. One or more SWI3S Peripheral IP can be connected specific to the application. Arasan’s SWI3S Manager Controller Core can be configured specific to the physical interface […]
SWI3S PERIPHERAL CORE IP
Overview Arasan’s SWI3S (SoundWire I3S Interface) Peripheral Controller Core IP implements the link protocol to communicate in half-duplex fashion to transfer the Audio streams and the Control information together. This SWI3S Peripheral IP is a responsive, time-synchronized, and power-aware component within the SoundSire-I3S ecosystem.
I3C PHY
The I3C bus is used for various sensors in the mobile/automotive system where the Host transfers data and control between itself and various sensor devices. The I3C interface is intended to improve upon the features of the I2C interface, preserving backward compatibility. This I3C defines a standard multi-Drop interface between Host processors and peripheral Devices […]
I3C Dual/Secondary Controller IP v1.2
The Arasan I3C Secondary Controller IP Core implements Active controller functionality as defined by the MIPI Alliance’s I3C Specification and Secondary Controller logic. The I3C bus is used for various sensors in the mobile/automotive system where the active controller transfers data and control between itself and various sensor devices. In some applications, the active controllers […]
I3C Device Controller IP v1.2
The Arasan I3C Device Controller IP Implements Device Controller functionality as defined by the MIPI Alliance’s I3C Specification. The I3C bus is used for various sensors in the mobile/automotive system where an I3C Host Controller transfers data and control information between itself and various sensor devices. The I3C Device Controller IP can be easily integrated […]