Arasan Announces Industry’s First Total eMMC 5.1 IP Solution

Arasan Chip Systems, Inc. the leader in Mobile Storage IP announces support for the latest version of JEDEC eMMC 5.1 and production ready silicon IP for eMMC HS400 PHY in 16nm.

Arasan, a leading provider of IP for semiconductor design and manufacturing, announces a complete single vendor eMMC 5.1 IP solution consisting of the eMMC Host controller IP with a matching eMMC HS400 PHY IP, the eMMC Device Controller IP with matching eMMC I/O Pads for dual voltage designs at 28nm and below and a comprehensive OVM based Verification IP for the controllers and PHY, The solution also includes a Hardware Validation platform and drivers to aid software development and FPGA prototyping. Together the offering is The Total eMMC 5.1 IP Solution.

Utilizing elements from a single vendor enables designers to quickly create eMMC 5.1 designs from concept through implementation and software development. As a leading provider of mobile storage IP, including SD, eMMC and UFS since 2001, Arasan is expanding its portfolio with a comprehensive, high quality eMMC 5.1 Total IP Solution, helping designers lower the risk and cost of integrating the latest eMMC 5.1 specification into their system-on-chip (SoC) designs. Arasan’s eMMC Total IP Solution is available for immediate demonstration at our offices and we will be demonstrating it at upcoming industry conferences. Demand for mobile content capacity and bandwidth for video, pictures and music is ever increasing. To address this demand in the next generation of smartphones, tablets, and portable devices, the eMMC 5.1 Specification from JEDEC, improves the current HS400 speeds operating at 3.2Gbps, with “command queuing” – making the data transfers highly efficient by offloading the software overhead into the controller. eMMC 5.1 further improves the reliability of operation by utilizing an “enhanced strobe” at the PHY layer. The eMMC5.1 is backward compabitle with the existing eMMC4.51 and eMMC5.0 Devices.

“Having our eMMC HS400 PHY IP in production at 16nm, an advanced node requiring specialized tools and skills, is a huge milestone for us. Our Total eMMC 5.1 IP Solution provides early adopters the fastest time to market with a reliable standards compliant product,” said Prakash Kamath, CTO at Arasan.

Arasan’s 28nm and 16nm general purpose I/O PADs are multipurpose PADs that can be programmed to operate in different modes: 1) Output with predetermined source/sink impedance, 2) Open drain, 3) Input, 4) Tristate and 5) Weak pull up or pull down. The I/O PADs are specially designed to seamlessly integrate with Arasan’s eMMC 5.1 and eMMC 5.0 host controller IP. Arasan introduced the industry’s first HS400PHY in 2013 on multiple 28nm nodes which are now in production. Development of the eMMC PHY in 16nm was completed during early 2014 and is also now production ready. Arasan is currently developing HS400 in 14nm and will be made available as part of it’s Total eMMC 5.1 IP Solution.

Arasan is a TSMC OIP partner supporting physical interface IP for MIPI, JEDEC, ONFI, USB and SD.


Arasan eMMC 5.1 Total IP Solution is available to license immediately. Arasan’s 16nm and 28nm eMMC 5.1 PAD and PHY offerings are also available in GDSII for immediate drop in to projects. Please contact Sales for additional information.


Arasan will host a free live webinar on eMMC 5.1 in February 2015. Please check the website for registration information:  Arasan Webinars

About eMMC

eMMC is the dominant flash interface in cell phones and tablets today. Shipments of eMMC solutions this year are forecasted to reach 700 million according to an IHS iSuppli Mobile & Embedded Memory Market Tracker report in segments such as tablets, e-book readers and portable GPS navigation devices. The eMMC v5.0 standard is projected to ramp quickly in mai

About Arasan
Arasan Chip Systems is a leading provider of Total IP Solutions for mobile storage and connectivity applications. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP cores, analog PHY interfaces, verification IP, hardware verification kits, protocol analyzers, software stacks and drivers, and optional customization services for MIPI, USB, UFS, SD, SDIO, MMC/eMMC, UFS, and many other popular standards. Arasan’s Total IP products serve system architects and chip design teams in mobile, gaming and desktop computing systems that require silicon-proven, validated IP, delivered with the ability to integrate and verify both digital, analog and software components in the shortest possible time with the lowest risk. Unlike many other IP providers, Arasan’s Total IP Solution encompasses all aspects of IP development and integration, including analog and digital cores, hardware development kits, protocol analyzers, validation IP and software stacks and drivers and optional architecture consulting and customization services. Based in San Jose, CA, USA, Arasan Chip Systems has a 20 year track record of IP and IP standards development leadership.