Arasan Chip Systems First to Release SDXC/SDIO3.0/eMMC4.4 Host Controller IP

SAN JOSE, Calif., Oct. 15, 2009 (GLOBE NEWSWIRE) — Arasan Chip Systems, Inc. ("Arasan"), a leading provider of Intellectual Property (IP) Cores, formally announced today the availability of the world's first, proven, Secure Digital eXtended Capacity (SDXC)/SDIO 3.0/eMMC 4.4 Host Controller IP. Arasan has been working over the last six months with major OEMs who have successfully integrated this IP into their SOCs, which will be in next generation mobile phones and netbooks. This IP is compliant with the latest SD Physical Layer Specification v3.0, Part E1 SDIO 3.0 specification and JEDEC's eMMC 4.4 specification. SoC designers now have the flexibility to tailor their memory subsystem to the functional requirements of their platforms.

"Arasan is the first IP provider to integrate three of the highest performance memory specifications available today into a single, high-quality IP core," said Prakash Kamath, Vice-President of Engineering at Arasan. "Designers building consumer and mobile electronics now can optimize their memory interface to meet their performance, security and expanding application requirements of their new platforms."

"SoC designers have been looking for a standard, scalable solution to future proof their systems' ever growing need for memory and high-performance I/O," said Somnath Viswanath, Product Marketing Manager at Arasan. "By integrating Arasan's SDXC/SDIO3.0/eMMC4.4 Controller IP, designers can be the first to offer innovative platform solutions with sufficient performance for the most demanding applications — today and in the future."

About the SDXC/SDIO/eMMC controller

Arasan's SDXC/SDIO/eMMC controller reduces BoM cost and improves data security while accommodating increasing capacity for rapidly growing embedded software. The IP has native support for all SDXC/SDIO/eMMC commands, and it supports all of the SD, SDHC, SDXC, SDIO, MMC, and card formats. It has built-in hardware support for multiple data protection schemes such as mechanical switch-based, password, temporary or permanent write protection. In addition to traditional password based, host configurable write protection schemes, the controller also supports the recently introduced Replay Protected Memory Block feature of eMMC 4.4. System designers can also use this controller to boot from embedded eMMC devices thereby eliminating a NOR code storage chip from their platforms.

The controller is capable of both DDR (50 MB/s) and SDR (up to 104 MB/s) operation. SoC's based on this controller can take advantage of the new security and enhanced card data management features supported by these latest standards. In addition to traditional password based, host configurable write protection schemes, the controller supports the recently introduced Replay Protected Memory Block feature of eMMC 4.4. System designers can also use this controller to boot from embedded memory devices such as eSD and eMMC thereby eliminating a NOR code storage chip from their platforms.

Arasan enables technology adoption by providing a "Total IP Solution" for its SDXC/SDIO3.0/eMMC4.4 Host Controller, consisting of RTL code, synthesis scripts, verification and test environments, software stacks and documentation all backed by its world-class customer support. Arasan's SDXC/SDIO/eMMC controller future proofs SoC designers' non-volatile memory subsystem for generations of electronic systems.