Arasan Announces the Immediate Availability of its 2nd Generation MIPI D-PHY v1.1 IP for TSMC 22nm Process Technology

SAN JOSE, California, Jan. 14, 2021 /PRNewswire/ — Arasan Chip Systems, a leading provider of semiconductor IP for mobile and automotive SoCs, today announced the immediate availability of its 2nd Generation MIPI D-PHY v1.1 IP supporting speeds of up to 1.5 Gbps on TSMC 22nm process technology for SoC designs. The MIPI D-PHY IP is further optimized for lower power targeting wearables and IoT Display applications which require low throughput for their small lower resolution screens, but where power is of paramount importance. The D-PHY IP is also available as a Tx only IP for companies looking to save silicon area and further improve power consumption. The MIPI D-PHY IP is seamlessly integrated with Arasan’s own DSI Tx and DSI Rx IP Cores as part of its Total MIPI Display IP Solution for wearables and IoT.

Arasan Sirius MIPI C-PHY / D-PHY ASIC on TSMC Foundry

Arasan’s D-PHY IP is available on both TSMC’s industry-leading 22nm ultra-low power (22ULP) and 22nm ultra-low leakage (22ULL) process technologies. TSMC 22nm ultra-low power (22ULP) is an ideal foundry technology for applications including image processing, digital TVs, set-top boxes, smartphones and consumer products in terms of its power, performance and area (PPA) optimization, while its 22nm ultra-low leakage (22ULL) technology provides significant power reduction to support IoT and wearable device applications. 

Arasan has been a contributing member to the MIPI Association 2005 with over a billion chips shipped with its MIPI IP. Arasan MIPI D-PHY IP is proven on its own test chip on TSMC 28nm process, which has been licensed by multiple customers since 2016 and validated along with its CSI IP and DSI IP with 3rd Party VIP as a Total IP Solution. The company’s MIPI CSI, DSI, DPHY and CPHY IP are also used in compliance and production testers further attesting the quality and compliance of Arasan IP.

The MIPI D-PHY IP is also available off the shelf on the TSMC 40nm, 28nm, 16nm and 12nm process technologies.

A D-PHY / C-PHY Combo HDK based on Arasan’s ASIC applications on TSMC 28nm process is also available to licensees of Arasan’s DPHY IP or CPHY IP to prototype their Display or Imaging products before going to production. Customers can license with confidence in Arasan’s MIPI D-PHY IP knowing they can prototype with the real silicon on TSMC 28nm process, which is used in a MIPI Compliance Tester to test for MIPI CSI, DSI, D-PHY and C-PHY Standards Compliance. We are Compliance!