Arasan Chip Systems, a leading provider of semiconductor IP today released its MIPI CPHY Eye diagram from Arasan’s TSMC FINFET Test Chip operating at 4.5 Gsps. Immediate available in Tsmc 12nm, 7nm and 5nm. Will be available at 8 Gsps on TSMC 5nm in Q2 2023.
Jan 17, 2023, San Jose, CA: Arasan Chip System is proud to announce the immediate availability of the C-PHY v2.O/D-PHY Combo Test chip supporting speeds in excess of 4.5gsps. The C-PHY/D-phy Combo implemented in silicon on a TSMC foundry FINFET Test Chip.
The Eye Diagram captured from Arasan’s C/D-PHY TestChip on CPHY mode is provided below,
Arasan’s C-PHY 2.O, D-PHY v2.5, CSI-2 and DSI-2 IP join Arasan’s illustrious line of IP previously used for Compliance Testing like its SDIO Device IP, SD/SDIO HOST IP, UFS2.1,3.O & 4.O IP M-PHY DFE and the MIPI CSI-2, DSI, C-PHY V1.1 and D-PHY V1.2 IP that were used in the industry’s first C-phy compliance tester. That product was based on Arasan’s C/D-PHY Combo ASIC supporting 2.5 gsps.
Arasan Chip Systems is a leading provider of total IP solutions for mobile storage and mobile connectivity interfaces. Arasan’s high-quality, silicon-proven, total IP solutions include digital IP cores, analog PHY interfaces, verification IP, HDK and software stacks. Arasan is at the forefront of the evolution of “Mobile” with its standards-based IP at the heart of Mobile, Automobile
and Iot SoC’s.
Over a bilion chips have been shipped with Arasan IP including with all of the top 10 semiconductor companies.
MIPI® is a registered trademark owned by MIPI Alliance. C-PHY℠ nad D-PHY℠ are service marks of MIPI Alliance.