Mobile systems rely on a large number of complex IP functions for memory and peripherals subsystems. To enable rapid adoption of digital IP into customer silicon, most design IP vendors offer synthesizable RTL source, synthesis scripts, and verification IP. For analog and mixed-signal IP, most vendors offer a complete physical design package, along with chip integration guidelines. These deliverables address design integration and functional verification, however, for evolving standards there are other gaps that early adopters must fill to realize the competitive advantage of right-the-first-time development with the shortest time to market.
Emulation has become a critical component of system design, allowing hardware and software development and debug to proceed in parallel. For peripheral subsystems, the host and it’s associated application stack communicate with a device and driver. And increasingly a high-speed serial link is involved. This is the point where emulation must be complemented with hardware validation.
Validation of silicon and end systems with new connectivity standards is a time to market challenge. Serial connectivity with high-speed analog and differential signaling is now more of a norm with new connectivity standards. The differences lie in power management capability, bit rates, and common mode and differential voltage levels. Behind the analog PHY’s are link layers that incorporate increasingly complex hardware and software protocols to increase system level connectivity options. Consequently, a true Total IP Solution has gone beyond verification and physical design enablement. Combined hardware/software modeling and implementation of target or peer devices or systems is a necessity for both hardware/software validation and software development – starting with FPGA boards, all the way through silicon reference boards and production testing. Arasan is generally among the first to implement new mobile connectivity protocols, and consequently among the pioneers who successfully complete interoperability testing sessions with other contributors to standards organizations, like JEDEC, MIPI Alliance and SD Association. Hence, among IP vendors, Arasan is generally the first to offer HVP’s to fill the validation gap. That’s how the Total IP Solution contributes to our customers’ achieving their time to market objectives with connectivity that interoperates with peer devices correctly.