Arasan Chip Systems, Inc. (“Arasan”), a leading provider of Total IP Solutions for mobile applications, announced results of successful compatibility testing of Arasan’s Total SD 4.1 IP Solution, including Host interface, software stack and UHS-II interface card at the SDA InterOp in Tokyo, November 2014. Leading devices suppliers with SD 4 cards spanning 8GB to 128GB were successfully tested in a Linux based host environment with Arasan digital and analog IP and software stack.
To meet the ever increasing data transfer rate in high end applications, such as professional broadcasting transmission or advanced high resolution display, the SD 4.1 specification calls out the maximum performance of 1.56 Gbps at UHS-II full duplex mode per lane or half duplex UHS-II at 3.12 Gbps. With ADMA 3, the OS driver is now able to issue multiple read or multiple write commands at once, without having to wait for the SD controller to complete one command at a time. Once the SD host controller has collected multiple commands, it will then manage and complete them without intervention from the host software drive. Thus, the UHS-II 1.56 Gbps interface can be more effectively utilized and maximize the system throughput. This feature can be very useful when running multithreaded applications where multiple applications are constantly updating their status or swapping their contents by writing or reading small chunk of data to or from the memory card.
“The SDA InterOP sessions provide an excellent opportunity to test our SD 4.1 Total IP solution with SD product suppliers in a cooperative engineering environment,” said Surender Sharma, Hardware Engineering Manager at Arasan.
Arasan introduced the industry’s first combined SD 4.1, SDIO 4.1, eMMC 4.5.1 Host Controller in early 2014. Arasan’s long-standing active contributor status to both SDA and JEDEC allows a first to market advantage with both storage card and embedded Flash memory controllers for mobile applications. Arasan provides a complete suite of tools for IP integration including SD 4.1 link layer controller IP, UHS-II PHY in advanced process technologies, verification IP with robust test suite, FPGA validation and development platform, and software stack in source code. The link layer controller IP is designed with the most interoperability in place. Arasan has conducted several interoperability tests to ensure wide range of compatibility with different products in the market. Developed in advanced, 40nm and below process nodes, the UHS-II PHY is designed for higher signal integrity and lower power consumption compared to competition. Arasan’s SD 4.1 Host is offered an integrated eMMC 4.51 and SDIO 4.1 solution. Arasan also provides IP and software for SD 4 devices.
Arasan SD 4.1 / SDIO 4.1 / eMMC 4.5.` Host Controller, SD 4.1 Device Controller and SDIO 4.1 Device Controller are available now, including digital (RTL) IP, UHS-II PHY (SD 4.1), Verification IP (VIP), Linux Software Stack in source code, and Hardware Validation Platforms (HVP), with all supporting documents.