Arasan Chip System offers a challenging and rewarding work environment in delivering leading edge technology for the Mobile industry. As part of the expanding growth in this segment ACS is looking for a senior ASIC digital design engineer.
The candidate will have the opportunity to develop IP cores used in Mobile storage and Mobile connectivity.
Candidate must have a BSEE with 7 to 10 yrs or MSEE with 5 to 10 years ASIC design and verification experience. Candidate must be motivated, results oriented with a proven track record in one or more of these areas:
- Protocol expertise in an interconnect standards such as MIPI, USB, PCIE, JEDEC.
- Protocol expertise in system bus standards such as AXI/AHB.
- Developing System Architecture and/or module level Microarchitecture specifications.
- Hands-on experience with Verilog RTL coding and debug.
- Problem solving and analytical skills.
- FPGA prototype debug and system bring up skills; expertise with debug equipment such as analyzers and scopes.
- Good written and spoken communication skills and technical documentation skills.
- Technical leadership and project management skills.