Arasan’s Universal Flash Storage 3.0 (UFS 3.0) is a simple but high performance, serial interface primarily used in mobile systems, between host processing and nonvolatile eXecute-In-Place (XIP) or mass storage memory devices.
Mobile phones, UMPC, DSC, PMP are some of the typical applications for UFS Host Controller IP. The majority of these applications require mass storage and bootable storage memory with an option for an external card.
The IP incorporates the latest UFS Host Controller Interface (HCI) version 3.0. Arasan’s MIPI M-PHY® HS-G4 IP is available in GDSII format for a variety of process technologies and MIPI UniProSM version 1.8 link layer with support for multi-lane operation and the optional Unified Memory Architecture (UMA) implementation.
Arasan’s UFS 3.0 Host Controller allows for highly secured applications by employing AES encryption. The data encryption and decryption is done seamlessly by the controller as data is written to or read from the UFS 3.0 device.
FEATURES
Compliant with the following specification versions:
JESD220D.pdf
JESD223D.pdf
MIPI UniPro version 1.8
MIPI M-PHY version 4.1
Interfaces Supported:
AXI Bus Protocol (AXI)
Advanced High Performance Bus (AHB), Open Core Protocol (OCP) (Optional)
High-performance M-PHY type 1
Core Features:
Two Lanes
Low power with multiple power operating modes
Configurable Transmit and Receive First In First Out (FIFO)s
Error Detection and Reporting:
Supports data and task management
Supports for multiple commands and tasks
Built-in advanced encryption standard (AES) hardware engine to exchange private data to storage device.
128bit key support
AES-CBC operating mode support
Capable of back-to-back processing for the data units that fit into an even number of 64-bit input words
DELIVERABLES
Synthesizable RMM compliant Verilog RTL code. Easy-to-use comprehensive OVM/UVM based randomized test environment (Ref. Sec 8, UFS VIP). Synthesis scripts Technical documents User guide
BENEFITS
Seamless integration from PHY to Software Assured compliance across all components Single point of support Easiest acquisition process (one licensing source) Lowest overall cost including cost of integration Lowest risk for fast time to market
SD Card UHS-II PHY TSMC 12nm Test Chips & eMMC 5.1 PHY TSMC 12nm Test Chips
SD Card UHS-II PHY TSMC 12nm Test Chips & eMMC 5.1 PHY TSMC 12nm Test Chips
